The LP2995MX linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDRSDRAM. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. The LP2995MX also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DDR DIMMS.

Features:
Low output voltage offset
Works with +5v, +3.3v and 2.5v rails
Source and sink current
Low external component count
No external resistors required
Linear topology

Applications:
DDR Termination Voltage
SSTL-2
SSTL-3

Datasheet Available:National LP2995MX

SOIC 8 package. Manufactured by National.
A20264S